AMD CEO Lisa Su unveiled the first details about the company’s EPYC Milan-X processors, which come with a 3D-stacked L3 cache called 3D V-Cache, during its Accelerated Data Center event today. AMD says that its new cache-stacking technology, which it will add to the existing Zen 3-powered EPYC Milan models to create the new Milan-X chips, will bring up to 768MB of total L3 cache per chip. That means there will soon be dual-socket servers with an eye-popping 1.5 GB of L3 cache in the system. AMD also shared a few examples of workloads that will benefit, and an impressive benchmark result that shows a 60% performance improvement.

The chips will come to market in Q1 2022, but they are available as a preview instance in Azure now. Microsoft has released its own performance projections here, too, but we’ll cover those in the article below as well. 

As a quick refresher, AMD introduced its 3D V-Cache technology at CES 2021, showing a third-gen Ryzen prototype outfitted with an additional chunk of L3 cache. 3D V-Cache uses a novel new hybrid bonding technique that fuses an additional 64MB of 7nm SRAM cache stacked vertically atop the Ryzen compute chiplets to triple the amount of L3 cache per Ryzen chip. AMD claims that brings up to a 15% performance improvement in some games, meaning those chips will vie for the title of Best CPU for gaming when they come to market early next year. We’ve since learned many more details about those chips, including deep-dive info on the packaging tech at a Hot Chips presentation earlier this year. 

AMD EPYC Milan-X Specifications

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AMD Milan-X

(Image credit: Tom’s Hardware)
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AMD Milan-X

(Image credit: Tom’s Hardware)
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AMD Milan-X

(Image credit: Tom’s Hardware)
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AMD Milan-X

(Image credit: Tom’s Hardware)